#: 17902 S12/OS9/68000 (OSK)
    13-Apr-93  04:06:21
Sb: #17894-MM/1 disasm
Fm: Mark Griffith 76070,41
To: Bob van der Poel 76510,2203 (X)

Bob,

 > I'm confused by the way some of the ports are addressed. For
 > example, I see stuff like:
 >
 >         move.b $9ffc01,d0
 >
 > So, assuming that there is a device with its base addresses at $9ffc00, just
 > what is at $9ffc01? BTW, the mm/1 tech man suggests that the MC68901 on the
 > main board is at $9ffc00.

That address is where the 68901 on the mother (CPU) board is.  The base address
is indeed $9FFC00 and the offset of 1 points to the general purpose data
register of that chip.  Here are some offsets for you:

 /* define base addresses of I/O chips */

 #define SIG_070S               80002011                        /* serial port
t0 */
 #define MOT_901a               10484736                        /* serial port
t0 and t1 */
 #define MOT_901b               14680960                        /* serial port
t2 */
 #define MOT_681                14680704                        /* serial ports
t3 and t4 */
 #define MOT_230                14680448                        /* parallel
ports */
 #define WD33C65                10484929                        /* WD33C65
floppy cntlr */
 #define RTC            14680577                        /* DS1287 Real Time
Clock */

 /* define offsets for the 68901 register map */

 #define GPDR_901a      (u_char *)(MOT_901a + 1)        /* gen purp data reg */
 #define DDR_901a       (u_char *)(MOT_901a + 5)        /* data direction reg
*/
 #define UCR_901a       (u_char *)(MOT_901a + 41)       /* USART control reg */
 #define RSR_901a       (u_char *)(MOT_901a + 43)       /* Recvr status reg */
 #define TSR_901a       (u_char *)(MOT_901a + 45)       /* Trans status reg */
 #define UDR_901a       (u_char *)(MOT_901a + 47)       /* USART data reg */

Hope this helps you figure it all out.

                  /************* /\/\ark ************/