On 03/09/2020 18:23, A. Dumas wrote:
> Pancho wrote:
>> No mention of pipelines in my copy of "Assembly Language Programming for
>> the BBC Microcomputer" by Ian Birnbaum.
>
> Nor in this seminal machinecode book of the 80's
> https://ee1.nl/misc/machinecode.pdf (15 MB)
Neither the 6502 or Z80 were pipelined, but if they were it wouldn't be
something that needs to concern the programmer, even when using
assembler. The same is true for the ARM.
This isn't the case for all processors, as some early RISC chips such as
MIPS expose the effects of pipe-lining by having a branch delay slot
i.e. the instruction after a branch will be executed regardless of
whether the branch is taken or not, as it is already in the pipeline.
Most other processor flush any instructions in the pipeline after a
taken branch, which was could be wasteful until good branch prediction
came along, although most slots were filled with No Ops in practice.
Processors also have much longer pipelines now, and it would be very
difficult to code for a variable number of branch delay slots.
ARM tackled pipe-lining issues in in Aarch32 by eliminating the need for
most small branches by using conditional instructions, which was great
when programming by hand. This has been deprecated by better branch
prediction and the use of Thumb, which has an IF THEN ELSE instruction
to determine which of the following 4 instructions is executed depending
on a condition.
Aarch64 has eliminated conditional codes from all instructions except
for branches, but has a small number of conditional arithmetic
instructions. For example CSEL allows you to calculate the result of
both the THEN ELSE instructions (usually in parallel with superscalar
chips) then chose which value to use.
---druck
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