In article ,
 "Bill Garber"  wrote:

> "John B. Matthews"  wrote in message 
> news:nospam-1DEF0D.08155419092008{at}news.motzarella.org...
> > In article 
> > ,
> > David Wilson  wrote:
> > 
> >> On Sep 19, 6:39 am, "John B. Matthews"
 wrote:
> >> 
> >> > > > >> Translation:
> >> > > > >> LDA #$10
> >> > > > >> STA $C08B ;ACIA_Control Register
> >> > > > >> LDA #$0B
> >> > > > >> STA $C0AA ;ACIA_Command Register
> >> > > > >> LDA $C0A8 ;ACIA_Data
> >> > > > >> RTS
> >> 
> >> > Ah, I see. Then there's some kind of 32x external clock?
> >> > $0B (%00001011): 1 stop bit, 8 data bits, external
clock, 3600 baud.
> >> 
> >> The $10 stored in the control reg selects 1 stop, 8 bits, ext rx clk, 
> >> XTL/16 bps where XTL = 1.8432 MHz so the baud rate is 115200 bps.
> > 
> > Thanks, David. I had the command and control registers reversed when I 
> > tried to interpret the values.
> > 
> > Also, my table was wrong. I had incorrectly indicated that clearing the 
> > low nibble of the control register specified an external clock, which is 
> > actually specified in bit four. I think I fixed it:
> > 
> > http://home.woh.rr.com/jbmatthews/ssc.html#tbl3>
> 
> "Bits 0-3 clear: 1,843,200 MHz / 16 = 115,200 baud" 
> 
> Getting there, the above should read:  
> 
> "Bits 0-3 clear: 1,843,200 Hz / 16 = 115,200 baud"  ;-) 

Good catch! Off by a mere 10^6; sadly, that's an improvement :-)

-- 
John B. Matthews
trashgod at gmail dot com
home dot woh dot rr dot com slash jbmatthews
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