On 28/02/2020 22:15, Folderol wrote:
> On Fri, 28 Feb 2020 22:01:34 GMT
> Alister  wrote:
>
>> On Fri, 28 Feb 2020 12:27:48 -0500, Dennis Lee Bieber wrote:
>>
>>> On Fri, 28 Feb 2020 11:39:05 GMT, Jan Panteltje
>>> 
>>> declaimed the following:
>>>
>>>
>>>> The GPIO as _digital_ input sees a 'logic zero' below some voltage and a
>>>> 'logic one' above  some voltage.
>>>> Th exact voltage can vary,  also  depends on temperature and production
>>>> spread,
>>>> but is somewhere between 0 and 3.3 V
>>>>
>>>>
>>>  Presuming common CMOS thresholds of 30 and 70%: <0.99V is LOW,
>>> 2.31V
>>> is HIGH. What the circuit does between those thresholds is indeterminate
>>> (I'd hope it holds the last valid state until the far threshold is
>>> crossed).
>>
>> that is exactly what does NOT happen.
>> the logic sate will flip at some in-determinant point between the two
>> thresholds. The thresholds are simply points at which the state is
>> guaranteed.
>
> This is mostly true, but not when the device specifies a schmitt trigger
input,
> when indeed the output is held until the second threshold is reached.
>
IS the PI GPIO input  schmitt trigger?


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