On Fri, 28 Feb 2020 22:01:34 GMT, Alister wrote:

>> Presuming common CMOS thresholds of 30 and 70%: <0.99V is LOW,
>> 2.31V is HIGH. What the circuit does between those thresholds is
>> indeterminate (I'd hope it holds the last valid state until the
far
>> threshold is crossed).
>
> that is exactly what does NOT happen.
> the logic sate will flip at some in-determinant point between the two
> thresholds.

And even when it has flipped it can flip back again if the signal
remains between the thresholds. Hence the requirement for pull
up/down resistors.
--
Cheers
Dave.

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