apple2freak{at}gmail.com wrote:

> I can't imagine someone using the old tools even on a 4MHz Apple II
> being as productive as someone using a more modern cross-development
> environment on a PC.  A modern editor (well, emacs isn't exactly
> modern, but...) combined with the near-instantaneous compilation of
> even very large (for the Apple II) programs would be responsible for a
> large part of this increased productivity I suspect.

Definitely. I was building a project for the TRS-80 a few years back, and on 
an emulator configured for "actual" speed, it was taking several
minutes to 
assemble. After 1 or 2 builds I switched to using a PC editor for the 
source, and ran the emulation in "turbo" mode, and it took literally 2 
seconds to build.

> Given the large die sizes used in the old days, I imagine it should be
> possible (given access to suitable equipment) to slice open the chip
> and examine the die under a fairly low power microscope.  This should
> enable reconstruction of an equivalent circuit.  Hardly worth the
> effort, though, except perhaps for the challenge of doing it.  That's
> assuming that Apple wouldn't be willing to provide details on the
> ASICs from their archives.

This has been done before - and is being done now - quite successfully on 
several different devices for the purpose of arcade machine emulation. Very 
impressive stuff!

>>> Also, with an FPGA, it is my understanding that you can tap or probe
>>> any signal you like by designing the system in such a way as to bring
>>> these signals to the FPGA I/O lines.  
> No -- you simply decide what signals you want to be able to access,
> and build them into your original design.

Actually, it's better than that. Both Xilinx and Altera (major FPGA vendors) 
provide tools that allow you build a virtual logic analyzer inside your 
FPGA. No need to reserve pins and hack your design to bring signals out - 
you can define which signals you want and add trigger conditions like a real 
analyzer.

> OTOH, someone with a "development system" could dynamically compile a
> particular "instance" of hardware they would like to use, and then
> load it into their system.  This would be analagous to having
> reconfigurable peripheral cards in a real Apple II except that you're
> entire system would be reconfigurable.  If you got tired of the Apple
> II one day and decided you wanted to try out a TRS-80, you'd just have
> to create a new implementation and you'd have it.

It's called the "C-One". http://www.c64upgra.de/c-one/>

> I suspect you could load at least 10 68000 cores onto one of the
> larger FPGAs made today.

The TG68 core in Minimig takes 5,112 logic cells on an EP2C35 (or roughly 
14%). Using crude extrapolation, an EP3C120 would allow you some 23 68k 
cores. But they're quite expensive!

> I hope by tinkering around with reconfigurable hardware based on Woz's
> design from the 1970s/1980s to gain some greater insight into this,
> not to mention having some fun and learning a few useful tricks along
> the way.

I'll have to side with Michael here. I seriously doubt looking at a HDL 
(FPGA) implementation of Woz's design will give you much insight into the 
black magic that he used. It's just too removed from the source, and even a 
"gate for gate" implementation in HDL is still a level of abstraction away.

Regards,

-- 
|              Mark McDougall                | "Electrical Engineers do it
|  http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"
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