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echo: osdebate
to: Adam
from: Rich Gauszka
date: 2006-09-27 10:09:48
subject: Re: 80 core CPU?

From: "Rich Gauszka" 


"Adam" <""4thwormcastfromthemolehill\"{at}the
field.near the bridge"> wrote in message
news:45199d23{at}w3.nls.net...
> 80????
>
> 80?
>
>
http://news.com.com/2100-1006_3-6119618.html?part=rss&tag=6119618&subj=news
>
>
> "Intel's prototype uses 80 floating-point cores, each running at
> 3.16GHz, said Justin Rattner, Intel's chief technology officer, in a
> speech following Otellini's address. In order to move data in between
> individual cores and into memory, the company plans to use an on-chip
> interconnect fabric and stacked SRAM (static RAM) chips attached
> directly to the bottom of the chip, he said."
>
>
http://www.infoworld.com/article/06/09/27/40OPcurve_1.html

If I had a vote, I'd have both vendors stop at four cores and focus on fat
and fast busses that give those cores something to fill instead of
something to wait for. AMD and Intel both face bus bottlenecks, and that's
the bane of multi-core. Presently, dual-core CPUs from both chipmakers have
to share memory and I/O buses that were designed to serve a single CPU
core. Every time you add a core, contention for access to memory and
peripherals rises, lowering the genuine performance benefit of the extra
core. Even AMD's laudable design can't deliver near-linear performance
gains from additional cores. AMD is revamping AMD64's total design for
quad-core so that even when cores get stuck in contention, the busses run
so fast that the traffic clears quickly. AMD is taking a run at getting
third-party vendors signed up to place their peripherals directly on its
Hypertransport serial bus. If AMD can make that work, then, potentially,
every core can have direct access to system peripherals. That would be a
quantum leap for x86.

What worries me is that Intel might just go nuts bumping the number of
cores, clock speed, cache and front-side bus speed while more or less
hewing to today's Core Microarchitecture in terms of key factors like
bringing its memory and bus controllers on-chip. Let's say that AMD wants
to hold fast at quad or octo-core and work on perfecting the total system
architecture so it can keep up. But what if Intel keeps cranking on core
and gigahertz? While AMD is sledding along with eight cores, non-uniform
memory architecture and direct on-core bus links from everything to
everything in the system, Intel might ship a 16-way Core Microarchitecture
CPU/chipset that looks more or less like Cloverdale 4-way, except for
more-you guessed it-cache, gigahertz and cores.

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