On Thu, 28 Mar 2019 23:52:08 -0700 (PDT), gourav madhan
declaimed the following:
>I am working on a project so I am thinking to use shift register as I have
hundreds of inputs coming from user
"Hundreds" You're going to be spending most of your life just
processing the parallel to serial operation.
https://www.electronics-tutorials.ws/sequential/seq_5.html
You would need one of these
https://pdf1.alldatasheet.com/datasheet-pdf/view/15550/PHILIPS/74HC166.html
for every 8 inputs, configured in a daisy-chain (serial out of one to the
serial in of the next).
Operationally: you would have to lower the Parallel Enable (PE) bit
using one GPIO (and a driver circuit due to the number of chips you are
feeding), THEN trigger the clock line (a second GPIO and driver as it also
goes to all chips -- low to high transition is the signal to shift/load) to
have all the chips load the current state of the inputs. Raise the PE to
lock the parallel input data. THEN toggle the clock line once for each
input bit, reading the final serial out (using another GPIO set to input).
For 100 inputs, you would have to do this clock low->high, read serial bit,
clock high->low, repeat.. This assumes you've hard-wired the clock enable
and master reset lines -- otherwise you need two more GPIOs with drivers
for them.
Are you going to reading each input bit into a separate byte, or will
you be adding logic to load 8 bits to a byte, then move to another byte? A
TIVA C would be more useful for that as it has a block of memory that is
mapped to another address range where each address only affects one bit at
a time -- instead of 100s of bytes each being a 1 bit value, one would use
the bit-mapped addresses, and only use 10s of bytes for actual storage.
You might also need level shifters if the 74HC166 requires 5V signals
(one upshift for the control lines, one downshift for the serial data being
read).
--
Wulfraed Dennis Lee Bieber AF6VN
wlfraed@ix.netcom.com HTTP://wlfraed.home.netcom.com/
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