From: "Tony Ingenoso" 

If you've only got 16K of L1 and the chip runs 10X slower on an L1 miss,
what good is the pipeline when its sucked instantly dry by the execution
unit waiting on an L1 line load?

Modern OOP bloatware will blast the crap out of that tiny L1. These
machines aren't running nearly as fast as they're advertised.

There's more embedded CPU's sold than desktops anyway.  Intel still sells
embedded 386SX/DX and 486SX/DX's.  This is a big market.

"Geo"  wrote in message news:4278395e{at}w3.nls.net...
> "Tony Ingenoso"  wrote in message
> news:427701a9$1{at}w3.nls.net...
> > ~30% faster on the benchmarks I ran against a 386SX.  The 16 bit
> > bus CPU's are VERY memory constrained.  Almost anything you
> > can do to minimize the amount of code they're fetching is a win.
>
> Ok, so an 386sx electronic picture frame might benefit from it but what
> about the prescott P4 16kb L1 cache netburst 31 stage pipeline extreme
> edition? Or even a dual core Pentium D? It just seems to me there is so
much
> going on in those chips you can't just automatically assume a change like
> that is going to have much of an effect at all.
>
> Geo.
>
>

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