Hi..
 SM> CH> Ralf Brown also documents port A0h. He says if you set bit 7 to a 
1'
 SM> CH> then NMI is prevented from reaching the CPU.
 SM> No mention of bit 7 of port 70h?  (I'm feeling too lazy at the moment
 SM> to unarchive Ralf Brown's list again... ;)
Ralf sure does... however it's only relevant on an AT+, and we were 
discussing an XT environment, so I didn't mention it.
NMI circuitry is probably one of the most 'messed around with' aspects of the
PC design in terms of changes between XT and AT... Most other changes 
remained 'compatable' with the XT.. but not NMI.
NMI wasn't the only incomptable change though...  The DMA page registers were 
another part of the design to get altered in an incompatable manner.
       Craig
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