JV> I've recently been wondering about multiprocessor boards-- how on
 JV> earth would a guy code for them?  
 
 JC> reducing the requirements for cache coherency - i.e. when
 JC> one processor changes a location, the other processors might
 JC> not see that change immediately.  However, when we allow
 JC> this, we have to compensate for it in the programming
 JC> somehow, so it tends to be less popular.
So these individual processors run until a memory location is changed,
causing an interrupt and allowing the others to catch up, refreshing
their "view" of the memory pool and then continuing?  I'm not sure that
I like that one.. The word "stumbling" comes to mind.
 JC> The other major group of multiprocessor mahines are loosely
 JC> coupled machines.  Instead of sharing RAM to communicate
 JC> between processors, these act a bit more like a network of
 JC> separate machines: each has its own RAM, and they have sort
 JC> of high speed communications mechanism between the processors.  
I wonder if that has anything to do with the somewhat incomprehensible
news in the local paper the other day- something about a 1gb/s transfer
mechanism. The article mentioned it might be used in ether-networking
but now from what you've said it sounds like it has an even more intense 
use as a "chipset" of sorts (lacking a better term) within the machine.
Still somewhat clueless but a greater appreciation is mine, thanks for 
the info.
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