*** Peter Magnusson wrote in a message to Scott McNay:
 SM> It's 100% compatible
PM> Way... I didn't know they EVER made a processor
PM> 100% compatible with another. There's often
PM> some small diffrences in undocummented or
PM> even docummented instructions & features, right?
PM> I mean, don't most cpu-detections that don't use
PM> CPUID use that?
PM> No expert on the subject, just seen a few code
PM> samples and glimbsed (wrong spelling?) at www.x86.org
PM> (not that I claim to have quoted them in any sense)
There are two known ways that they can be differentiated by software.  First, 
by calculating the size of the prefetch queue; this is done by using 
self-modifying code.  The second way is to determine if there's a noticeable 
speed difference between accessing byte-aligned data and word-aligned data. 
The 8088 picks up data a byte at a time, so there's no speed difference.  The 
8086 picks up data a word at a time, so the second byte of a word is 
available immediately if the first byte is being read at the same time, but 
if the word is not word-aligned, the second byte of a word would be in the 
next word-aligned word, which would require an extra read (I hope that that 
isn't too comfusing ;)
Byte aligned:
8088:
  0    1    2    3
  ---- ---- ---- ---- 4 bytes
  ---------           1 word, word-aligned, reads 2 bytes
       ---------      1 word, not word-aligned, reads 2 bytes
8086
  0    1    2    3
  ----=---- ----=---- 4 bytes, made of 2 words of 2 bytes each
  ---------           1 word, word-aligned, reads 1 word (2 bytes)
       ---------      1 word, not word-aligned, reads 2 words (4 bytes)
So, no, they're not QUITE 100% compatible, but the difference is so trivial 
that the only people who would notice are those doing two things that are 
normally no-nos, namely writing self-modifying code and writing 
timing-dependent code.
--Scott.
--- timEd 1.01
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