Replying to a message of Tim Hutzler to Serguei Shtyliov:
 TH>> It is considered poor programming practice with the 86xx family, but
 SS>> What do you mean?
 TH> A constant displacement is risky, since it may cause the
 TH> system to crash if the assembler options is set to use long
 TH> displacements.
Always a possibility, but one easily overcome by always using explicit 
overrides: JMP SHORT $+2 or JMP NEAR $+3, for example.
 SS>> It's been widely used to insert a delay between 2 I/O port
 SS>> accesses on the 80x86 PCs until 486/P5 have appeared.
 TH> NOPs would seem better, IMHO.
Not really; since the prefetch queue must be re-read as soon as the JMP is 
executed, the JMP instruction is virtually guaranteed to force enough time 
until the i/o instruction has completed and the response can be read. Given 
the unpredictability of hardware access time, it would be virtually 
impossible, I think, to predict the exact number of NOPs that would be 
required to produce enough of a wait in all instances.
The JMP has the added advantage, in situations where the memory footprint of 
the code is an issue, of requiring only 2 or 3 bytes, whereas one byte per 
NOP is always required.. a few bytes may not seem like much with the amount 
of memory generally available today, but if everyone thinks that way every 
time, total memory requirements will quickly build.
--- FleetStreet 1.20 NR
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