You can test every way and still have memory defects undetected. Take my
original experience with an 8080. The original memory test wrote all ones in
memory, then all zeroes at each test location - followed by a read and
compare. then wrote all zeroes into memory, followed by an all ones test at
each location. Then wrote, with all memory locations at zero, the marching
one test where Bit 0 is a 1 and all other bits are zero - then read and
compare. After all memory locations are checked, the memory was tested with
the marching zero test. At this point the memory test failed only when the
6th bit was zero at a particular location. IOW the memory failure only
occurred (repeatedly) at the very end of this next to last test.
Memory failures can occur from many reasons. For example, the sense amp
only reads zeros incorrectly when most or all other memory locations
connected to that sense amp are one. Or a logic one becomes logic zero only
after a period of time when all adjacent memory capacitors are logic 1.
You can design a test for say a 1 Mb DRAM, only to have the 4 Mb DRAM setup
completely different.
But this is a consistent characteristic. Heating memory to normal
operating temperatures of above 100 degree F make all memory tests very much
more effective at locating bad memory. In fact a poor memory test can be
made far better than the most comprehensive 4 hour memory test simply by
adding heat to the test fixture.
Notice how those with little knowledge of this advocate fixing an
intermittnet problem by adding fans. They do so because they don't
understand the theories behind the tests and the failures - they only have
practical experience without any understanding of the theory.
And that is what you need to build a good memory test - understanding of
the fundamental operations of memory chips - the sense amps, the CAS/RAS, the
output driver delays, the layout of the various memory capacitors within the
chips, etc.
--- Maximus 3.01
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* Origin: Castrovalva BBS 610-917-0380 (1:2626/102)
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