Hi Tom,
You wrote to Victor Kemp:
TT>I'll put you on the right track:
TT>By default (that is, unless the PIC is reprogrammed by e.g.
TT>the OS) the interrupt priority is as follows:
TT>IRQ0 (timer)
TT>IRQ1 (keyboard)
TT>IRQ2 (cascaded to second 8259 on AT)
Oops!
TT>IRQ9 (realtime clock, AT only)
That should be:
IRQ8 (Real Time Clock)
IRQ9 ISA bus (redirected XT IRQ2 line)
I suspect you already know this Tom, but for the benefit of any who
don't this is the IRQ line on the ISA card bus that _always_ causes
confusion. On the original XT it was IRQ2, when IRQ2 was used for
cascadeing in the second 8259 PIC in the AT, the card bus connection was
moved to IRQ9. So any hardware (usually 8 bit expansion cards) that
allows selection of IRQ2, will actually have the interrupt on IRQ9 on
the 16 bit ISA bus
TT>IRQ10 (AT only)
TT>IRQ11 (AT only)
TT>IRQ12 (AT only)
TT>IRQ13 80287 NMI (AT only)
TT>IRQ14 hard drive (AT only)
TT>IRQ15 (AT only)
TT>IRQ3 serial port 2
TT>IRQ4 serial port 1
TT>IRQ5 parallel port 2
TT>IRQ6 floppy disk
TT>IRQ7 parallel port 1
Note that IRQs 0, 1, 8, & 13 do not connect to the card expansion bus.
For reference, one OS that does rotate the priority structure is OS/2.
It sets IRQ3 as the highest priority interrupt unless it detects that
the priority has already been rotated by the BIOS.
George
 * SLMR 2.1a * Wastebasket: Something to throw things near.
--- Maximus/2 3.01
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