-=> On 22 Mar 97  20:30:25 Mike Bilow said to Jonathan de Boyne Pollard <=-
 >    New! Support for Intel MMX technology
 >    With support for the new Intel MMX technology, Watcom C/C++ 11.0
AG> JdBP> What a marvellous piece of puffery!  They sell the compiler
AG> JdBP> on the basis of all of this "new MMX technology" and make a
AG> JdBP> fortune
AG> JdBP> I bet that compiler marketing people adore Intel for
AG> JdBP> inventing this MMX lark.  (-:
 MB> Let's see if it actually speeds up any real code.
AG>What to MMX instructions do ?
AG>What I want to know is what effect they have on data?

AG>Like, could I use them to perform set operations as part of database
AG>processing? Or pattern matching?

They are intense bit twiddling op's. There are things like 64 bit And,
Or and Xor's; several types of compares and shifts etc; so I would say it
depends on your dataset needs. Anything that you can work into a matrix.
That is why they are being hyped for 3d video, voice recognition, sound.

Actually, in my few weeks of research, I have found that the most concise
place to find information on MMX is not from Intel but from AMD. Intel
has merged everything about MMX into their standard documents and it
makes getting the big picture very difficult. AMD on the other hand has
published a single document which addresses only MMX as it relates to its
arrival in their new K6 processor.  AMD has an intellectual property
license from Intel therefore the information is the same.  If you have
internet access, you can go to www.amd.com and get the ADOBE Acrobat
(.PDF) document labled AMD K6 Multimedia Extensions.  It is 118 pages
about 1.1 Meg and very well written.  Basically MMX uses a Single
Instruction Multiple Data model.  There are 57 new instructions added, it
uses 8 new logical registers which are overlaid on top of the FPU stack
registers.  Here are some selected quotes for the introductory section of
the document which may help as a description.

"The MMX architecture includes four new data types, 57 new instructions,
eight new 64-bit registers, and an SIMD processing pipeline.  The
multimedia extensions are compatible with existing x86 applications.  The
57 new instructions include arithmetic functions, packing and unpacking
functions, logical operations, and moves.  These are the basic functions
that are most commonly used in repetitive computational multimedia
programs."

"Multimedia applications often use smaller operands 8-bit data is
commonly used for pixel information and 16-bit data is used for audio
samples.  The new MMX registers allow data to be packed into 64-bit
operands.  For example, 8-bit data (1 byte) can be packed in sets of
eight in a single 64-bit register, and all eight bytes can be operated on
simultaneously by a single MMX instruction."

"Multimedia applications frequently multiply and accumulate data.  The
multimedia extensions provide instructions that add, multiply, and even
combine these operations.  For example, the PMADDWD instruction can
multiply and then add words of data in a single instruction that uses far
less processor cycles than the equivalent x86 operations."

"The multimedia extensions use a packed data format.  The data is packed
in a single, 64-bit MMX register or memory operand as eight bytes, four
words, or two double words.  Each byte, word, doubleword, or quadword is
an integer data type.  The form of an instruction determines the data
type.  For example, the MOV instruction comes in two different forms
MOVD moves 32 bits of data and MOVQ moves 64 bits of data.  The four new
data types are defined as follows:"

Packed byte     Eight 8-bit bytes packed into 64 bits
                Signed integer range  (-2^7 to 2^7 -1)
                Unsigned integer range ( 0 to 2^8 -1)
Packed word     Four 16-bit words packed into 64-bits
                Signed integer range (-2^15 to 2^15 -1)
                Unsigned integer range (0 to 2^16 -1)
Packed          Two 32-bit doublewords packed into 64 bits
doubleword      Signed integer range (-2^31 to 2^31 -1)
                Unsigned integer range (0 to 2^32 -1)
Quadword        One 64-bit quadword
                Signed integer range (-2^63 to 2^63 -1)
                Unsigned integer range (0 to 2^64 -1)
"
The multimedia extensions include 57 new instructions.  These new
instructions are organized into the following groups:

        o Arithmetic
        o Empty MMX registers
        o Compare
        o Convert (pack/unpack)
        o Logical
        o Move
        o Shift

Hope this helps you. As I pointed out, I think the least confusing path
is to read the AMD document first and then maybe Intel's documents for
any minor differences like CPUID detection etc.

--Lynn

 * SLMR 2.1a * Law of Cybernetic Entomology-There's always one more bug!

--- DB 1.39/004485