Hi Jasen! :-)

 JB> Having the pixels 4-byte alligned helps the CPU to address them and
 JB> write them in a single operation. and results in a performance increase 
 JB> for pixel-orientated operations.
Actually, that doesn't work since the CPU memory bandwidth exceeds the
speed at which graphics memory can be accessed over the bus (even AGP)
anyway, and x86 hardware doesn't pay much misalignment penalty. Intel even
reduced the penalty for misaligned access on the P4 on the grounds that
lots of programs use them.

The GPUs on the graphics card themselves do profit from 4-aligned pixels,
though. Having pixels three bytes long would require extra complicated
silicion design because that size cannot be handled by mere shifts and
masking out of bits as is possible with sizes that are powers of 2. The
GPUs do of course have high-speed connection to their on-board RAM, and
efficient access matters a lot there.

Ciao
Pascal

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