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| subject: | 8-bit LPT cable |
"KEN HRYNCHUK" bravely wrote to "ALL" (14 Sep 04 11:17:00)
--- on the heady topic of "8-bit LPT cable"
KH> Has anyone done 8-bit file transfers via the PC's parallel port?
KH> I'm thinking of using the following cable configuration:
KH> DB25M DB25M
KH> ----- -----
KH> 1 DDDDDDDDDDDDD 1
KH> 2 DDDDDDDDDDDDD 15
KH> 3 DDDDDDDDDDDDD 13
KH> 4 DDDDDDDDDDDDD 12
KH> 5 DDDDDDDDDDDDD 10
KH> 6 DDDDDDDDDDDDD 11
KH> 10 DDDDDDDDDDDDD 5
KH> 11 DDDDDDDDDDDDD 6
KH> 12 DDDDDDDDDDDDD 4
KH> 13 DDDDDDDDDDDDD 3
KH> 14 DDDDDDDDDDDDD 14
KH> 15 DDDDDDDDDDDDD 2
KH> 16 DDDDDDDDDDDDD 16
KH> 17 DDDDDDDDDDDDD 17
KH> 25 DDDDDDDDDDDDD 25
KH> Will the above be compatible with 4-bit transfer software (e.g.
KH> Interlink), and will it be usable on EPP/ECP ports, as well as
KH> SPP (i.e. 'Legacy') ports? Indeed, will it be usable, at all?
KH> I did run across a couple of other configurations, but they were
KH> listed as being for EPP/ECP ports only, and I do require the legacy
KH> support.
KH> Ken (who does realize that there are faster ways to transfer files
)
According to my notes your above diagram is correct for 8 bit and 4 bit LL.
There are many other kinds of connections... don't forget some gnd's too.
Follows below more info than you ever wanted :)
>>
Parallel Link Cable
-------------------
There are basically two types of parallel link cables: 4-bit and 8-bit.
The 8-bit cable contains more lines and uses an additional register on the
parallel port for faster data transfer.
DB25M DB25M
----- -----
1 ............. 1 <-- 8-bit only
2 ............. 15
3 ............. 13
4 ............. 12
5 ............. 10
6 ............. 11
10 ............. 5
11 ............. 6
12 ............. 4
13 ............. 3
14 ............. 14 <-- 8-bit only
15 ............. 2
16 ............. 16 <-- 8-bit only
17 ............. 17 <-- 8-bit only
25 ............. 25
4-bit/8-bit Parallel Pin Configuration
Note: The "Laplink" cable is 4-bits.
>>
16. Transfer Modes and Cables
Mode 1A: nibble mode, using Data Out to Status In connection
This version works with all parallel ports; commercial xfer software style.
Side 1 Pin dir Pin Side 2 connection
------ --- --- --- ------ ----------
D0 2 => 15 S3+ direct
D1 3 => 13 S4+ direct
D2 4 => 12 S5+ direct
D3 5 => 10 S6+ direct
D4 6 => 11 S7- inverted
S7- 11 <= 6 D4 inverted
S6+ 10 <= 5 D3 direct
S5+ 12 <= 4 D2 direct
S4+ 13 <= 3 D1 direct
S3+ 15 <= 2 D0 direct
Gnd 25 === 25 Gnd (ground)
Mode 1B: nibble mode, using Data Out to Status In connection
This version works with all parallel ports; bit positions matched.
Side 1 Pin dir Pin Side 2 connection
------ --- --- --- ------ ----------
D3 5 => 15 S3+ direct
D4 6 => 13 S4+ direct
D5 7 => 12 S5+ direct
D6 8 => 10 S6+ direct
D7 9 => 11 S7- inverted
S7- 11 <= 9 D7 inverted
S6+ 10 <= 8 D6 direct
S5+ 12 <= 7 D5 direct
S4+ 13 <= 6 D4 direct
S3+ 15 <= 5 D3 direct
Gnd 25 === 25 Gnd (ground)
Mode 1C: nibble mode, using Data Out to Status In connection; Controls wired
for additional interfaces. This version works with all parallel ports.
Side 1 Pin dir Pin Side 2 connection
------ --- --- --- ------ ----------
D3 5 => 15 S3+ direct
D4 6 => 13 S4+ direct
D5 7 => 12 S5+ direct
D6 8 => 10 S6+ direct
D7 9 => 11 S7- inverted
S7- 11 <= 9 D7 inverted
S6+ 10 <= 8 D6 direct
S5+ 12 <= 7 D5 direct
S4+ 13 <= 6 D4 direct
S3+ 15 <= 5 D3 direct
C0- 1 * 1 C0- direct
C1- 14 * 14 C1- direct
C2+ 16 * 16 C2+ direct
C3- 17 * 17 C3- direct
Gnd 25 === 25 Gnd (ground)
* Note: Control Out bits on receiver set high (including inversion, ie:
C0,C1,C3=0; C2=1). Control feedback on receiver can read control out from
sender. Can use some lines each way, and could switch C0 - C2 and C1 - C3
for symmetry if we want two lines each way, or other variations.
Mode 2: 8 bits, using bidirectional parallel port
This version works only with bidirectional parallel port whose Data Out can
be tristated; the receiving side must tristate its Data Out port to use its
feedback register as an 8 bit input port.
Side 1 Pin dir Pin Side 2 connection
------ --- --- --- ------ ----------
D0 2 * 2 D0 direct
D1 3 * 3 D1 direct
D2 4 * 4 D2 direct
D3 5 * 5 D3 direct
D4 6 * 6 D4 direct
D5 7 * 7 D5 direct
D6 8 * 8 D6 direct
D7 9 * 9 D7 direct
C0- 1 => 13 S4+ inverted
C1- 14 => 12 S5+ inverted
C2+ 16 => 10 S6+ direct
C3- 17 => 11 S7- direct
S4+ 13 <= 1 C0- inverted
S5+ 12 <= 14 C1- inverted
S6+ 10 <= 16 C2+ direct
S7- 11 <= 17 C3- direct
Gnd 25 === 25 Gnd (ground)
* Note: bidirectional cards only; receiving side must tri-state with C5=1
If a two bidirectional ports are left connected in this fashion, and they are
both enabled (eg: after powerup or reset) with different data outputs, then
the 74LS374 driver chips could be "fighting". Just to be careful, when I
created a cable like this (actually, a DB25 jumper box usually sold for
RS-232 jumpering, along with straight through 25 line DB-25 cables), I used 8
10K resistors between the corresponding Data lines, to limit current in this
case. (Actually, a DIP resistor pack fit perfectly on the PC board inside
the DB-25 jumper box). The resistors are large enough to keep TTL output
from overstressing another one if both enabled, but when one is disabled and
the other enabled, the resistors are low enough to allow the TTL output to
drive a TTL input well enough.
Mode 3A: 8 bits, using Open Collector Control Outputs as inputs
This version uses 4 control outputs as inputs, plus 4 status inputs.
Side 1 Pin dir Pin Side 2 connection
------ --- --- --- ------ ----------
D0 2 =>* 1 C0- inverted
D1 3 =>* 14 C1- inverted
D2 4 =>* 16 C2+ direct
D3 5 =>* 17 C3- inverted
D4 6 => 13 S4+ direct
D5 7 => 12 S5+ direct
D6 8 => 10 S6+ direct
D7 9 => 11 S7- inverted
C0- 1 <=* 2 D0 inverted
C1- 14 <=* 3 D1 inverted
C2+ 16 <=* 4 D2 direct
C3- 17 <=* 5 D3 inverted
S4+ 13 <= 6 D4 direct
S5+ 12 <= 7 D5 direct
S6+ 10 <= 8 D6 direct
S7- 11 <= 9 D7 inverted
Gnd 25 === 25 Gnd (ground)
* Note: Control outputs used as inputs must be programmed high:
And that's TTL HIGH on the "output" pins, NOT JUST
C0, C1, C3 = 0 and C2 = 1 !!!!
Mode 3B: 8 bits, using Open Collector Control Outputs as inputs
This version uses 3 control outputs as inputs, plus 5 status inputs;
remaining control output is bidirectional - if left high by default,
either side can pull low (remember inverted logic).
Side 1 Pin dir Pin Side 2 connection
------ --- --- --- ------ ----------
D0 2 =>* 1 C0- inverted
D1 3 =>* 14 C1- inverted
D2 4 =>* 16 C2+ direct
D3 5 =>* 15 S3+ direct
D4 6 => 13 S4+ direct
D5 7 => 12 S5+ direct
D6 8 => 10 S6+ direct
D7 9 => 11 S7- inverted
C0- 1 <=* 2 D0 inverted
C1- 14 <=* 3 D1 inverted
C2+ 16 <=* 4 D2 direct
S3+ 15 <=* 5 D3 direct
S4+ 13 <= 6 D4 direct
S5+ 12 <= 7 D5 direct
S6+ 10 <= 8 D6 direct
S7- 11 <= 9 D7 inverted
C3- 17 17 C3- direct (OC shared)
Gnd 25 === 25 Gnd (ground)
* Note: Control outputs used as inputs must be programmed high:
And that's TTL HIGH on the "output" pins, NOT JUST
C0, C1, C3 = 0 and C2 = 1 !!!!
>><<
M*i*k*e
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