CC>    I've not found anything examples for the SIB byte.
CC>    Any examples showing each of the different addressing type
CC>    would be helpful.
SIB byte format is:
ss iii bbb
        ss is the two-bit scaling field: 00 = 1, 01 = 2, 10 = 4, 11 = 8
        iii is the index register, and 100 means there is no index
        bbb is the base register, 101 means disp32 if mod is 00, otherwise
          it's [EBP+disp]
The address is calculated as [base + (scale * index) {+ disp}]
The mod bits determine the size of the displacement.
CC>    also,
CC>    using prefix's
CC>    using 32bit instructions (pentium and below)  mov eax,ebx  mov 
eax,[ebx]
The operand-size override prefix is 66h, and the address-size override prefix
is 67h.  These reverse 16/32 bit operands and addresses, respectively.  In a
Use16 segment, the default is 16 for both, and in a Use32 segment the default
is 32 bit operands/addresses.
For 32-bit indirect memory operands, the r/m bits in most cases mean [reg {+
disp}], except for 100 which means a SIB is needed, and mod=00, r/m=101 means
DS:disp32.  For the reg bits, the extended registers use the same codes as
their subregisters would.
((Cloud))
MauveCloud@juno.com
 * OLX 2.2 * My Karma has just run over your Dogma.
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