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| subject: | Os/2 Smp |
PH>> Might this be the reason for the slowdown (two threads/apps access PH>> the same memory areas) ? DR> But, just as a practical matter, if multiple threads DR> accessing the same memory causes that bad DR> a performance degredation, then what good is SMP? There are also all those kernel spinlock semaphores. Lots of kernel stuff only runs on one of the multiple processors. The story is, not much time is spent in kernel code, so dropping to one processor is OK. That's the party line. It's like "32-bit" OS/2 and "32-bit" Windows (can you say "thunk"?). It's one thing to have Gene Amdahl laughing quietly in the distance and quite another to invite him into the party, let the prettiest girl sit on his lap, and make drinks for him. it's easy to see that affordable SMP will suffer the h/w stalls you suspect, and that SMP that does not will be even more expensive. still, i'd give h/w the benefit of a doubt until you have shown solid improvement on one SMP box vs another. the s/w may also need to evolve. ___ X KWQ/2 1.2e X Intel: Accruacy Inside --- Maximus/2 2.02* Origin: OS/2 Shareware BBS, Fairfax, VA: 703-385-4325 (1:109/347) SEEN-BY: 12/2442 54/54 620/243 624/50 632/348 640/820 690/660 711/409 410 413 SEEN-BY: 711/430 807 808 809 934 942 949 712/353 623 713/888 800/1 @PATH: 109/347 2 7 3615/50 229/2 12/2442 711/409 54/54 711/808 809 934 |
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