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echo: 80xxx
to: DAVID SIMAL
from: TOM TORFS
date: 1997-05-27 22:11:00
subject: INT 6 & INT 7

David Simal wrote in a message to All:
 DS>     Can someone help me understand how works the CPU generated
 DS> interrupts 06 & 07 (INVALID OPCODE & NO PROCESSOR EXTENSION
 DS> AVAILIBLE), I heard that it is possible to emulate other
 DS> instructions/processor using those interrupts, for example, when
 DS> reprogramming int 06, it is possible, for example, to emulate
 DS> pentium instructions on a 486, or even MMX instructions on a
 DS> pentium processor. The int 07 can be used to emulate a math
 DS> coprocessor when it is not present... 
I would assume, your emulation routine would simply have to look at the 
return address pushed on the stack in your exception handler, and then take 
appropriate action (i.e. emulate the instruction and move on EIP as many 
bytes as required).
greetz,
Tom
tomtorfs@mail.dma.be
--- timEd/2 1.10+
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* Origin: 80X86 BBS 32-15-24.62.32 V.34/V.FC (24h/24h) (2:292/516)

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