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19 May 2005, 10:49, BEN RITCHEY (1:393/68), wrote to ALL:
Hi BEN.
BR> I am using one of those IDE to USB I/F cables (works great) and
BR> would like to add a remote LED "activity" light to the device. Is
BR> there a pin on the 40-pin IDE cable that will accomplish this? Should
BR> I use a simple transistor I/F (resistance coupled) to isolate the
BR> tap?
Looks like you can, but have not tried this:
----- IDEPIN begins -----
348/509 13 Sep 92 09:25:00
From: Tony Talarigo
=================================================================
AT Interface
40-pin Cable
AT INTERFACE SIGNAL PIN ASSIGNMENTS
PIN NAME DESCRIPTION
_________________________________________________________________________
01 /Host (From Host, Active Low) Reset signal from
Reset the host.
02 Ground - - - -
03-18 - - - Host data 0-15 to/from host. 16-bit tris-
tate, bidirectional data bus between host
and drive. The lower 8-bits of host data
(0-7) are used for register and ECC access.
All 16-bits are used for data transfers.
19 Ground - - - -
20 Key An unused pin, which is clipped off at the
drive to prevent incorrect cable attach-
ment.
21 Reserved - - - -
22 Ground - - - -
23 /HIOW (From Host, Active Low) Host I/O write
strobe. Edge clocks data from the host data
bus to I/O register.
24 Ground - - - -
25 /HIOR (From Host, Active Low) Host I/O read
strobe. Trailing edge clocks data from host
data bus to I/O register.
26 Ground - - - -
27 Reserved - - - -
28 Host ALE (From Host,Active High) Host address latch
enable. Used to qualify host address lines.
Host addresses are latched on the trailing
this has been changed edge of Host ALE. The drive does not use
this signal.
29 Reserved - - - -
30 Ground - - - -
31 IRQ14 (To Host, Tristate, Active High) Interrupt
request from drive to host. The host may
enable/disable the interrupt by clearing/
setting the /IEN bit of the Digital Output
register of the task file. The signal is
in a high impedance state when the drive is
not selected or when the /IEN bit of the
Digital Output register is set. The signal
is cleared when host performs a status read
from drive.
32 /HOST (To Host, Tristate, Active Low) When active
I/016 it indicates to host that the 16-bit Data
register is addressed and the drive is
ready to send/receive a 16-bit word.
33 Host (From Host, Active High) Host I/O address
ADDR1 line 1.
34 /PDIAG (Active Low) Passed diagnostics. Used by
Slave to signal to Master drive that Slave
has passed its internal diagnostics. See
note 3.
35 Host (From Host, Active Low) Host I/O address
ADDR0 line 0.
36 Host (From Host, Active High) Host I/O address
ADDR2 line 2.
37 /HOST (From Host, Active Low) Host I/O chip
CSO select decoded from host address lines.
When active, one of the registers in the
range 01F0HEX through 01F7HEX is selected.
38 /HOST (From Host, Active Low) Host I/O chip
CSI select decoded from host address lines.
When active, one of the registers in the
range 03F0HEX through 0347HEX is selected.
39 /HOST (To Host, Active Low) Dual purpose pin.
SLV/ACT When drive is Slave (SLV), this pin is used
during a Diagnostic command to signal to
the Master that a Slave is present. Drive
Activity to host: It is active when the
drive is executing a command. May be used
by host to drive an activity LED.
40 Ground - - - -
Notes:
1. Signal beginning with (/) is active low.
2. Reserved and Ground pins do not have directions.
3. /PDIAG and Host/SLV are used for communication between
Master and Slave.
=============================
XT Interface
(40-pin cable)
1.0 XT HOST/DRIVE INTERFACE PIN ASSIGNMENTS
PIN SIGNAL DESCRIPTION
__________________________________________________________________
1 RES (From Host,Active High) Bus Reset signal
3,5,7,9 DATA BUS Host data to/from host.8-bit tristate,bi-
11,13 directional data bus between host and drive.
15,17 Used for transferring Status, Data and
Control information.
19 GND Ground
20 Key An unused pin, which is clipped off at the
drive to prevent incorrect cable attachment.
21 AEN (From Host, Active High) Host address
enable, which is asserted during a DMA
cycle to disable the decoding of I/O port
addresses.
23 /IOW (From Host, Active Low) Host I/O write
signal for writing data to an I/O port
address.
25 /IOR (From Host, Active Low) Host I/O read
signal for reading data from an I/O port
address.
27 /DACK (From Host, Active Low) DMA acknowledge
signal asserted in response to the DMA
Request signal. This signal enables DMA
data transfer when either /IOR or /IOW
signals are active.
29 DRQ (To Host, Active High) DMA Request as-
serted by the drive to initiate a DMA
transfer.
31 IRQ (To Host, Active High) Interupt Request
asserted by the drive to cause an interrupt
to the host.
33,35 SA1,SA0 (From Host, Active High) Host I/O address
lines 0 and 1 for selecting the drive's
I/O ports.
37 /CS (From Host, Active Low) Card Select signal
asserted by the host to address the drive's
I/O ports.
39 /ACTIVE (To Host, Active Low) Drive Activity signal
asserted by the drive when it is processing
a command. Can be used to drive an external
LED indicator.
NOTE: All other even-numbered pins are ground.
=======================================
IDE interface pin assignments:
+-----+-------------+--------+--------+
| Pin | Drive Cable | Signal | AT Bus |
| No | Signal Name | Flow | Pin |
+-----+-------------+--------+--------+
| 1 | -Reset | <- | B2 |
| 2 | Ground | | B1 |
| 3 | D7 | | A2 |
| 4 | D8 | | C11 |
| 5 | D6 | | A3 |
| 6 | D9 | | C12 |
| 7 | D5 | | A4 |
| 8 | D10 | | C13 |
| 9 | D4 | | A5 |
| 10 | D11 | | C14 |
| 11 | D3 | | A6 |
| 12 | D12 | | C15 |
| 13 | D2 | | A7 |
| 14 | D13 | | C16 |
| 15 | D1 | | A8 |
| 16 | D14 | | C17 |
| 17 | D0 | | A9 |
| 18 | D15 | | C18 |
| 19 | Ground | | B1 |
| 20 | KEY | | |
| 21 | Reserved | | |
| 22 | Ground | | B1 |
| 23 | -IOW | <- | B13 |
| 24 | Ground | | B1 |
| 25 | -IOR | <- | B14 |
| 26 | Ground | | B1 |
| 27 | -IOCHRDY | -> | A10 |
| 28 | SPSYNC/ALE | <- | B28 |
| 29 | Reserved | | |
| 30 | Ground | | B1 |
| 31 | INTRQ | -> | D7 |
| 32 | -IOCS16 | -> | D2 |
| 33 | ADDR1 | <- | A30 |
| 34 | -PDIAG | | |
| 35 | ADDR0 | <- | A31 |
| 36 | ADDR2 | <- | A29 |
| 37 | -CS1FX | | |
| 38 | -CS3FX | | |
| 39 | -DASP | | |
| 40 | Ground | | B1 |
+-----+-------------+--------+--------+
Good luck... M.
--- Msged/386 TE 06 (pre)
* Origin: Matt's Hot Solder Point, New Orleans, LA (1:396/45.17)SEEN-BY: 633/267 270 @PATH: 396/45 106/2000 633/267 |
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