To:     Marius Bendiksen
From: Robert Lamanis c/o Paul Chamberlain
Subj:   info:protected mode
Hello, Marius.
First of all, thank you for replying to the questions that I asked 
concerning protected mode programming. The questions asked were
designed to give me feedback on some 'grey areas' documented in
the 'i486 programmers technical reference manual' and other resources.
I have come to certain concusions concerning the answers that you given me.
Here they are:
Question 1a. How does the AVL bit (bit 52) in the GDT descriptor affect the
operation of the CPU when a selector is loaded into a segment register?
- You said: If a selector is loaded into a segment register, and the AVL
bit is clear (0), the processor will signal an exception. 
In fact there was an error in my documtation that i sent concerning this
very bit. I said (in the descriptor table layout) that the AVL bit means:
'Selector available to system.' when in fact it should have said:
'Bit for use by system software. The CPU does not affect, or is affected by, 
the setting of this bit.' - Which is true (after testing and info from
other documentation) - the CPU treats this bit as a 'dummy' bit. System
software, however, can use this bit for its own use (in other words, do
whatever you like with it). I am not sure of how you have come to the
concusion that the processor will signal an exception if this bit is clear
(0) and a segment register is loaded with the relevant descriptor. Maybe
on the Pentium + , this may be the case (this i am not sure about), but
this would stray away from compatibility of earlier processors. 
Question 1b. How does the AVL bit affect the of memory addressing?
Well - It doesn't - it has absolutely no affect on the way the CPU operates
or the way memory is addressed.
Question 2. TYPE is a 4 bit field which affects the segment operation.
Bit 0 of TYPE states if the selector has been accessed. The CPU sets this
bit in the descriptor.
You said: True. 
Which is true, providing the selector is set up for accessing 'code' or 
'data' segments - not 'system' segments. If a selector is loaded into
a segment register - I.E. MOV ES,AX - where AX is the selector index, 
at this point, the CPU sets the 'accessed' bit (1) if the bit was (0). 
The reason i asked why your answer may of been true or false, was to 
determine if the CPU has some sort of hidden features not documented.
At this point i am fairly sure of my facts - however any further input
would be very appreciated.
You might be aware that I am only new to protected mode programming,
in which i am, however what i learn from the information provided, i will
document for my records (and that's a lot of documentation!!), and whatever
i don't understand, hopefully there is someone who does know. To be quite
honest, i find that some documented information goes into detail about
one thing and then is very, very brief on another - which leaves a 'grey'
area.
Well, thanks again for replying. Hope to keep in touch. 
... Have a nice day    Unless you've made other plans!
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