> Questions:
> ----------
> 1a.     How does the AVL bit (bit 52) in the GDT descriptor affect the
> operation of the CPU when a selector is loaded into a segment
> register ?
If a selector is loaded into a segment register, and the AVL bit is clear 
(0), the processor will signal an exception.
> 2.      TYPE is a 4 bit field which affects the segment operation.
> Bit 0 of TYPE states if the selector has been accessed.
> The CPU sets this bit in the descriptor.
> True or False ?
True.
> And explain why true or false ?
It could be useful to know wether or not the selector has been accessed, 
primarily for reasons of swap optimalization and debugging.
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