LE>> Some S3 and ATI Mach64 are I believe the culprits. In SVGA
LE>> modes they use an I/O range which overlaps 2E8-2EF to store linear
RL> Ok. thanks for that.  Seems a weird setup.

Bloody strange idea, I agree. Can't understand why they chose that address range.

-- Lewin A.R.W. Edwards [Team OS/2]  Tel 0419320415 * 0412809805 * 0414927056
@EOT:

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