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| subject: | Re: Flakey ZipChip 8000 |
On Feb 18, 8:38=A0am, Alex Freed wrote: > Steven Hirsch wrote: > > > Who currently owns the design and manufacturing rights for the ZipChip?= =A0 > > I'm wondering if they would be interested in disclosing the RTL > > description so it could be cloned into an FPGA. > > Just like with the z180 card we don't really need the RTL to make a > clone. If I remember correctly there is a patent covering the design > that has enough info for us "reasonably skilled in the kraft". > > The upcoming Carte Blanche will be a nice platform to implement it > inside a real Apple 2. > > BTW as an experiment I did build a complete Apple 2 on FPGA clocked at > 28 MHz and that was not a real limit. Ideally it would a system-in-chip design. It should be possible to fit it within the confines of a ZipChip sized board, if one used an external CPU and SRAM and the logic in a CPLD, all using QFP's... Heck, one of the freely available 6502 cores might even fit in a small CPLD! Matt --- SBBSecho 2.12-Win32* Origin: Derby City Gateway (1:2320/0) SEEN-BY: 10/1 3 34/999 120/228 123/500 128/2 140/1 222/2 226/0 236/150 249/303 SEEN-BY: 250/306 261/20 38 100 1404 1406 1410 1418 266/1413 280/1027 320/119 SEEN-BY: 393/11 396/45 633/260 267 712/848 800/432 801/161 189 2222/700 SEEN-BY: 2320/100 105 200 2905/0 @PATH: 2320/0 100 261/38 633/260 267 |
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