a2retro wrote:
>  To: Michael J. Mahon
> Michael J. Mahon wrote:
> 
>> a2retro wrote:
>>
>>>  To: a2retro
>>> a2retro wrote:
>>>
>>>> alex.freed.007 wrote:
>>>>
>>>>> The 128K version is particularly easy to use with a
battery back-up as
>>>>> it has an active high second chip select. Most likely
just adding a 
>>>>
>>>>
>>>>  > diode and a coin cell will make it NV.
>>>>
>>>> I have seen this implemented on a few other projects. zxmmc+ for 
>>>> example.
>>>>
>>>> I plan to use this approach for my //cmxp project.
>>>>
>>>> Cypress also has an interesting part CY14B104L-ZS45XC - combo 
>>>> SRAM/Flash with autosave.
>>>>
>>>> Glenn
>>>
>>>
>>>
>>> For anyone updating their card to a 512K ram - double check the 
>>> datasheet from your vendor of choice, as I see there doesn't seem to 
>>> be a standard on pin A17 and A18. They are interchanged across vendors.
>>
>>
>> Who cares what they label the address pins on a static RAM?
>> It's just address bits in --> data out.
>>
>> -michael
>>
>> NadaNet and AppleCrate II: parallel computing for Apple II computers!
>> Home page: http://home.comcast.net/~mjmahon
>>
>> "The wastebasket is our most important design
>> tool--and it's seriously underused."
> 
> 
> Okay I see what your saying - it will still work - it just won't be 
> accessed contiguously.

Since we don't know what the manufacturer did inside the chip,
"contiguous" is not a meaningful term.  The manufacturer's assignment
of address bit numbers can be purely arbitrary relative to the logical
and physical structure of the chip.

The only requirement is that when N unique address bits are presented,
a unique and repeatable bunch of bit cells is accessed.  Of course, the
same is true of the numbering of data bits.

-michael

NadaNet and AppleCrate II: parallel computing for Apple II computers!
Home page: http://home.comcast.net/~mjmahon

"The wastebasket is our most important design
tool--and it's seriously underused."
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