Glen Herrmannsfeldt wrote:
> Michael J. Mahon wrote:
> (snip)
> 
>> Who cares what they label the address pins on a static RAM?
>> It's just address bits in --> data out.
> 
> 
> Other than people wanting the same socket for EEPROM or Flash,
> RAM test patterns tend to depend on the address lines.

In an early implementation, the high-order address bit may simply
select between two stacked dice.  Or if the chips are accessed in
an "interleaved" manner, the low order address bit may select the
die!

In a later implementation, the high-order address bit may be just
a selection input into a demultiplexer.  In others, it may be an
input into an address decoder.

So any memory test (except the manufacturer's!) should generally
be written considering the actual logic of the chip as a black box.

The assignment of "order" to address bits matters only when
"sequential" or "page" have meaning.  (Flash is certainly an
example of this.)

-michael

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Home page: http://home.comcast.net/~mjmahon

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