TH> After all, the 16-bit model segmentation is limited to 1Mb
 TH> addressing, I never looked into how those folks at Intel did the
 TH> work-around.
 Going by some of the p/mode docs I've seen around, the system works by 
having cs, ds, etc all work as selectors - to cs=1234h does not mean your 
code is at 1234h:ip, but that the CPU understands cs=1234h to index an array 
or similar. Having 32bit offsets also helps, mind you =)
... . o  %%`----'.                    \ qp / __/\__      `----'           
--- FMail/386 1.0g
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