#: 14543 S15/Hot Topics
    09-Mar-92  00:59:05
Sb: #14512-#Secret 6309 Modes?
Fm: Lee Veal 74726,1752
To: Kevin Darling 76703,4227 (X)

Kevin,
   Here's what the manual says about AIM, OIM, EIM and TIM...

In addition to the HD6801 Instruction Set, the HD63x01xx has the following new
instructions:

 AIM----(M).(IMM)-->(M)
        Evaluates the AND of the immediate data and the memory, places
        the result in memory.
 OIM----(M)+(IMM)-->(M)
        Evaluates the OR of the immediate data and the memory, places
        the result in memory.
 EIM----(M)circled+(IMM)-->(M)
        Evaluates the EOR of the immediate data and the memory, places
        the result in memory.
 TIM----(M).(IMM)
        Evaluates the AND of the immediate data and the memory, changes
        the flag of associated condition code register.

Each instruction has three bytes; the first is op-code, the second is immediate
data, the third is address modifer.
   The xIM instructions can use only two addressing modes, Direct and Indexed. 
The op-codes codes for AIM, OIM, EIM and TIM are 71, 72, 75, 7B and 61, 62, 65,
for their respective addressing modes.  The Direct addressing instructions take
6 machine cycles to execute, while the Indexed addressing mode instructions
take 7 cycles except for the TIM which takes 4 and 5 cycles, respectively.

The HD63x01xx also has:

 XGDX---(ACCD)(IX)
        Exchanges the contents of accumulator and the index register.
 SLP----The CPU is brought to the sleep mode.

These two both use the Implied addressing mode, their opcodes are 18 and 1A,
they use 2 and 4 cycles, and their instruction lengths are 1 and 1,
respectively.

Hope this helps.

Lee



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